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ISL43L220
Data Sheet April 12, 2005 FN6093.2
Ultra Low ON-Resistance, Low Voltage, Single Supply, Dual SPDT Analog Switch
The Intersil ISL43L220 device is a low ON-resistance, low voltage, bidirectional, dual single-pole/double-throw (SPDT) analog switch designed to operate from a single +1.1V to +4.5V supply. Targeted applications include battery powered equipment that benefit from low RON (0.22) and fast switching speeds (tON = 11ns, tOFF = 5ns). The digital logic input is 1.8V logic-compatible when using a single +3V supply. Cell phones, for example, often face ASIC functionality limitations. The number of analog input or GPIO pins may be limited and digital geometries are not well suited to analog switch performance. This part may be used to "mux-in" additional functionality while reducing ASIC design risk. The ISL43L220 is offered in a small form factor package, alleviating board space limitations. The ISL43L220 is a committed dual single-pole/double-throw (SPDT) that consist of two normally open (NO) and two normally closed (NC) switches. This configuration can also be used as a dual 2-to-1 multiplexer. The ISL43L220 is pin compatible with the MAX4684 and MAX4685.
TABLE 1. FEATURES AT A GLANCE ISL43L220 Number of Switches SW 4.3V RON 4.3V tON/tOFF 3V RON 3V tON/tOFF 1.8V RON 1.8V tON/tOFF Packages 2 SPDT or 2-1 MUX 0.22 11ns/5ns 0.26 14ns/6ns 0.5 20ns/8ns 10Ld 3x3 thin DFN
Features
* Pb-Free Available as an Option (RoHS Compliant) (See Ordering Info) * ON Resistance (RON) - V+ = +4.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.22 - V+ = +3.0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.26 - V+ = +1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 * RON Matching Between Channels. . . . . . . . . . . . . . . . 0.03 * RON Flatness Across Signal Range . . . . . . . . . . . . . . 0.03 * Single Supply Operation. . . . . . . . . . . . . . . . . +1.1V to +4.5V * Low Power Consumption (PD). . . . . . . . . . . . . . . . . . <0.3W * Fast Switching Action (V+ = +4.3V) - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5ns * Guaranteed Break-Before-Make * 1.8V Logic Compatible (+3V supply) * Available in 10 lead 3x3 thin DFN * ESD HBM Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >9kV
Applications
* Battery powered, handheld, and portable equipment - Cellular/mobile phones - Pagers - Laptops, notebooks, palmtops * Portable Test and Measurement * Medical Equipment * Audio and video switching
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)" * Application Note AN557 "Recommended Test Procedures for Analog Switches"
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2004, 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL43L220 Pinout
(Note 1) ISL43L220 (TDFN) TOP VIEW
V+ 1 NO1 2 COM1 3 IN1 4 NC1 5 10 NO2 9 COM2 8 IN2 7 NC2 6 GND
Ordering Information
PART NO. (BRAND) ISL43L220IR (220) ISL43L220IR-T (L20) ISL43L220IRZ (220) (See Note) ISL43L220IRZ-T (L20) (See Note) TEMP. RANGE (C) -40 to 85 -40 to 85 -40 to 85 -40 to 85 PACKAGE 10 Ld 3x3 thin DFN 10 Ld 3x3 thin DFN Tape and Reel 10 Ld 3x3 thin DFN (Pb-free) PKG. DWG. # L10.3x3A L10.3x3A L10.3x3A
10 Ld 3x3 thin DFN L10.3x3A Tape and Reel (Pb-free)
NOTE: 1. Switches Shown for Logic "0" Input.
Truth Table
LOGIC 0 1 NOTE: PIN NC ON OFF PIN NO OFF ON
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Logic "0" 0.5V. Logic "1" 1.4V with a 3V supply.
Pin Descriptions
PIN V+ GND IN COM NO NC FUNCTION System Power Supply Input (+1.1V to +4.5V) Ground Connection Digital Control Input Analog Switch Common Pin Analog Switch Normally Open Pin Analog Switch Normally Closed Pin
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ISL43L220
Absolute Maximum Ratings
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 4.7V Input Voltages NO, NC, IN (Note 2) . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Output Voltages COM (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Continuous Current NO, NC, or COM . . . . . . . . . . . . . . . . . 300mA Peak Current NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . 500mA ESD Rating: HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>9kV MM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>500V CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>1kV
Thermal Information
Thermal Resistance (Typical, Note 3) JA (C/W) 10 Ld 3x3 DFN Package . . . . . . . . . . . . . . . . . . . . . 110 Maximum Junction Temperature (Plastic Package). . . . . . . . 150C Maximum Storage Temperature Range . . . . . . . . . . . . . -65C to 150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300C (Lead Tips Only)
Operating Conditions
Temperature Range ISL43L220IR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to 85C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 2. Signals on NC, NO, IN, or COM exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings. 3. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications - 4.3V Supply
Test Conditions: V+ = +3.9V to +4.5V, GND = 0V, VINH = 1.6V, VINL = 0.5V (Notes 4, 6), Unless Otherwise Specified TEST CONDITIONS TEMP (C) (NOTE 5) MIN TYP (NOTE 5) MAX UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON RON Matching Between Channels, RON RON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM ON Leakage Current, ICOM(ON) DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay, tD Charge Injection, Q OFF Isolation Crosstalk (Channel-to-Channel) Total Harmonic Distortion
Full V+ = 3.9V, ICOM = 100mA, VNO or VNC = 0V to V+ (See Figure 5) V+ = 3.9V, ICOM = 100mA, VNO or VNC = Voltage at max RON (Note 9) V+ = 3.9V, ICOM = 100mA, VNO or VNC = 0V to V+ (Note 7) V+ = 4.5V, VCOM = 0.3V, 3V, VNO or VNC = 3V, 0.3V V+ = 4.5V, VCOM = 0.3V, 3V, or VNO or VNC = 0.3V, 3V, or Floating 25 Full 25 Full 25 Full 25 Full 25 Full
0 -45 -110 -45 -100
0.23 0.03 0.03 -
V+ 0.35 0.35 0.06 0.06 0.08 0.08 45 110 45 100
V nA nA nA nA
V+ = 3.9V, VNO or VNC = 1.5V, RL = 50, CL = 35pF (See Figure 1, Note 8) V+ = 3.9V, VNO or VNC = 1.5V, RL = 50, CL = 35pF (See Figure 1, Note 8) V+ = 4.5V, VNO or VNC = 1.5V, RL = 50, CL = 35pF (See Figure 3, Note 8) CL = 1.0nF, VG = 0V, RG = 0, (See Figure 2) RL = 50, CL = 5pF, f = 100kHz, VCOM = 1VRMS (See Figure 4) RL = 50, CL = 5pF, f = 100kHz, VCOM = 1VRMS, (See Figure 6) f = 20Hz to 20kHz, VCOM = 2VP-P, RL = 600 f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25 Full 25 Full Full 25 25 25 25 25 25
2 -
12 5 4 128 68 -95 0.003 115 224
17 22 10 15 -
ns ns ns ns ns pC dB dB % pF pF
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7) COM ON Capacitance, CCOM(ON)
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ISL43L220
Electrical Specifications - 4.3V Supply
Test Conditions: V+ = +3.9V to +4.5V, GND = 0V, VINH = 1.6V, VINL = 0.5V (Notes 4, 6), Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP (C) (NOTE 5) MIN TYP (NOTE 5) MAX UNITS
PARAMETER POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+
Full V+ =1.1V to 4.5V, VIN = 0V or V+ 25 Full
1.1 -
-
4.5 0.06 1
V A A
DIGITAL INPUT CHARACTERISTICS Input Voltage Low, VINL Input Voltage High, VINH Input Current, IINH, IINL NOTES: 4. VIN = input voltage to perform proper function. 5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 6. Parts are 100% tested at +25C. Limits across the full temperature range are guaranteed by design and correlation. 7. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range. 8. Guaranteed but not tested. 9. RON matching between channels is calculated by subtracting the channel with the highest max Ron value from the channel with lowest max Ron value, between NC1 and NC2 or between NO1 and NO2. V+ = 4.5V, VIN = 0V or V+ (Note 8) Full Full Full 1.6 -0.5 0.5 0.5 V V A
Electrical Specifications - 3V Supply
Test Conditions: V+ = +2.7V to +3.3V, GND = 0V, VINH = 1.4V, VINL = 0.5V (Notes 4, 6), Unless Otherwise Specified TEST CONDITIONS TEMP (C) (NOTE 5) MIN TYP (NOTE 5) MAX UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON
Full V+ = 2.7V, ICOM = 100mA, VNO or VNC = 0V to V+ (See Figure 5, Note 8) V+ = 2.7V, ICOM = 100mA, VNO or VNC= Voltage at max RON (Notes 8, 9) V+ = 2.7V, ICOM = 100mA, VNO or VNC = 0V to V+ (Notes 7, 8) V+ = 3.3V, VCOM = 0.3V, 3V, VNO or VNC = 3V, 0.3V 25 Full 25 Full 25 Full 25 Full V+ = 3.3V, VCOM = 0.3V, 3V, or VNO or VNC = 0.3V, 3V, or Floating 25 Full
0 -
0.29 0.03 0.03 1.1 25 1.7 48
V+ 0.4 0.4 0.06 0.06 0.1 0.1 -
V nA nA nA nA
RON Matching Between Channels, RON RON Flatness, RFLAT(ON)
NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM ON Leakage Current, ICOM(ON) DYNAMIC CHARACTERISTICS Turn-ON Time, tON
V+ = 2.7V, VNO or VNC = 1.5V, RL = 50, CL = 35pF (See Figure 1, Note 8) V+ = 2.7V, VNO or VNC = 1.5V, RL = 50, CL = 35pF (See Figure 1, Note 8) V+ = 3.3V, VNO or VNC = 1.5V, RL = 50, CL = 35pF (See Figure 3, Note 8) CL = 1.0nF, VG = 0V, RG = 0 (See Figure 2)
25 Full 25 Full Full 25
2 -
14 6 7 95
20 25 12 17 -
ns ns ns ns ns pC
Turn-OFF Time, tOFF
Break-Before-Make Time Delay, tD Charge Injection, Q
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ISL43L220
Electrical Specifications - 3V Supply
Test Conditions: V+ = +2.7V to +3.3V, GND = 0V, VINH = 1.4V, VINL = 0.5V (Notes 4, 6), Unless Otherwise Specified (Continued) TEST CONDITIONS RL = 50, CL = 5pF, f = 100kHz, VCOM = 1VRMS (See Figure 4) RL = 50, CL = 5pF, f = 100kHz, VCOM = 1VRMS (See Figure 6) f = 20Hz to 20kHz, VCOM = 2VP-P, RL = 600 TEMP (C) 25 25 25 25 25 (NOTE 5) MIN TYP 68 -95 0.003 115 224 (NOTE 5) MAX UNITS dB dB % pF pF
PARAMETER OFF Isolation Crosstalk (Channel-to-Channel) Total Harmonic Distortion
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7) COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ V+ =1.1V to 3.6V, VIN = 0V or V+ Full 25 Full DIGITAL INPUT CHARACTERISTICS Input Voltage Low, VINL Input Voltage High, VINH Input Current, IINH, IINL V+ = 3.3V, VIN = 0V or V+ (Note 8) Full Full Full 1.4 -0.5 0.5 0.5 V V A 1.1 0.014 0.52 4.5 V A A
Electrical Specifications - 1.8V Supply
Test Conditions: V+ = +1.65V to +2V, GND = 0V, VINH = 1.0V, VINL = 0.4V (Notes 4, 6), Unless Otherwise Specified TEST CONDITIONS TEMP (C) (NOTE 5) MIN TYP (NOTE 5) MAX UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON
Full V+ = 1.65V, ICOM = 100mA, VNO or VNC = 0V to V+, (See Figure 5, Note 8) V+ = 2.0V, VCOM = 0.3V, 1.8V, VNO or VNC = 1.8V, 0.3V 25 Full 25 Full V+ = 2.0V, VCOM = 0.3V, 1.8V, or VNO or VNC = 0.3V, 1.8V, or Floating 25 Full
0 -
0.5 1.1 25 1.7 48
V+ 0.8 0.8 -
V nA nA nA nA
NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM ON Leakage Current, ICOM(ON) DYNAMIC CHARACTERISTICS Turn-ON Time, tON
V+ = 1.65V, VNO or VNC = 1.0V, RL = 50, CL = 35pF (See Figure 1, Note 8) V+ = 1.65V, VNO or VNC = 1.0V, RL = 50, CL = 35pF (See Figure 1, Note 8) V+ = 2.0V, VNO or VNC = 1.0V, RL = 50, CL = 35pF (See Figure 3, Note 8) CL = 1.0nF, VG = 0V, RG = 0 (See Figure 2) RL = 50, CL = 5pF, f = 100kHz, VCOM = 1VRMS (See Figure 4) RL = 50, CL = 5pF, f = 100kHz, VCOM = 1VRMS (See Figure 6)
25 Full 25 Full Full 25 25 25 25 25
2 -
22 9 9 49 68 -95 115 224
28 33 15 20 -
ns ns ns ns ns pC dB dB pF pF
Turn-OFF Time, tOFF
Break-Before-Make Time Delay, tD Charge Injection, Q OFF Isolation Crosstalk (Channel-to-Channel)
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7) COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
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Electrical Specifications - 1.8V Supply
Test Conditions: V+ = +1.65V to +2V, GND = 0V, VINH = 1.0V, VINL = 0.4V (Notes 4, 6), Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP (C) (NOTE 5) MIN TYP (NOTE 5) MAX UNITS
PARAMETER DIGITAL INPUT CHARACTERISTICS Input Voltage Low, VINL Input Voltage High, VINH Input Current, IINH, IINL
Full Full V+ = 2.0V, VIN = 0V or V+ (Note 8) Full
1.0 -0.5
-
0.4 0.5
V V A
Electrical Specifications - 1.1V Supply
Test Conditions: V+ = +1.1V, GND = 0V, VINH = 1.0V, VINL = 0.3V (Note 4), Unless Otherwise Specified TEST CONDITIONS TEMP (C) (NOTE 5) MIN TYP (NOTE 5) MAX UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON Resistance, RON
Full V+ = 1.1V, ICOM = 100mA, VNO or VNC = 0V to V+, (See Figure 5) 25 Full
0 -
2.6 3.4
V+ 3 4
V
DYNAMIC CHARACTERISTICS Turn-ON Time, tON V+ = 1.1V, VNO or VNC = 1.0V, RL = 50, CL = 35pF (See Figure 1, Note 8) V+ = 1.1V, VNO or VNC = 1.0V, RL = 50, CL = 35pF (See Figure 1, Note 8) V+ = 1.1V, VNO or VNC = 1.0V, RL = 50, CL = 35pF (See Figure 3, Note 8) 25 Full 25 Full Full 30 35 15 20 4 ns ns ns ns ns
Turn-OFF Time, tOFF
Break-Before-Make Time Delay, tD
DIGITAL INPUT CHARACTERISTICS Input Voltage Low, VINL Input Voltage High, VINH Input Current, IINH, IINL V+ = 1.1V, VIN = 0V or V+ (Note 8) Full Full Full 0.3 0.6 0.5 V V A
Test Circuits and Waveforms
V+ LOGIC INPUT 50% 0V tOFF SWITCH INPUT VNO 90% SWITCH OUTPUT 0V tON VOUT 90% LOGIC INPUT SWITCH INPUT NO or NC COM IN GND RL 50 CL 35pF VOUT tr < 20ns tf < 20ns V+ C
Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1A. MEASUREMENT POINTS
Repeat test for all switches. CL includes fixture and stray capacitance. RL -----------------------------V OUT = V (NO or NC) R + R L ( ON ) FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
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ISL43L220 Test Circuits and Waveforms (Continued)
V+ C
RG SWITCH OUTPUT VOUT ON OFF VOUT VG V+ LOGIC INPUT ON 0V
NO or NC
COM
VOUT
GND
IN
CL LOGIC INPUT
Q = VOUT x CL
Repeat test for all switches. FIGURE 2A. MEASUREMENT POINTS FIGURE 2. CHARGE INJECTION FIGURE 2B. TEST CIRCUIT
V+
C
V+ LOGIC INPUT 0V VNX
NO
COM
NC
VOUT RL 50 CL 35pF
IN SWITCH OUTPUT VOUT 90% 0V LOGIC INPUT GND
tD
Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 3A. MEASUREMENT POINTS FIGURE 3. BREAK-BEFORE-MAKE TIME FIGURE 3B. TEST CIRCUIT
V+ C SIGNAL GENERATOR V+ C
NO or NC
RON = V1/100mA
NO or NC
IN
0V or V+
VNX 100mA V1 IN 0V or V+
ANALYZER RL
COM
GND
COM
GND
Signal direction through switch is reversed, worst case values are recorded. Repeat test for all switches. FIGURE 4. OFF ISOLATION TEST CIRCUIT
Repeat test for all switches. FIGURE 5. RON TEST CIRCUIT
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FN6093.2 April 12, 2005
ISL43L220 Test Circuits and Waveforms (Continued)
V+ C V+ C SIGNAL GENERATOR
NO or NC COM
50
NO or NC
IN1 0V or V+ IMPEDANCE ANALYZER ANALYZER RL
COM NC or NO
IN
0V or V+
GND
N.C.
COM
GND
Signal direction through switch is reversed, worst case values are recorded. Repeat test for all switches. FIGURE 6. CROSSTALK TEST CIRCUIT
Repeat test for all switches. FIGURE 7. CAPACITANCE TEST CIRCUIT
Detailed Description
The ISL43L220 is a bidirectional, dual single pole/double throw (SPDT) analog switch that offers precise switching capability from a single 1.1V to 4.5V supply with low onresistance (0.22) and high speed operation (tON = 11ns, tOFF = 5ns). The device is especially well suited for portable battery powered equipment due to its low operating supply voltage (1.1V), low power consumption (4.5W max), low leakage currents (110nA max), and the tiny DFN package. The ultra low on-resistance and Ron flatness provide very low insertion loss and distortion to applications that require signal reproduction.
additional diodes limit the analog signal from 1V below V+ to 1V above GND. The low leakage current performance is unaffected by this approach, but the switch signal range is reduced and the resistance may increase, especially at low supply voltages.
OPTIONAL PROTECTION DIODE V+ OPTIONAL PROTECTION RESISTOR INX VNO or NC VCOM
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and to GND (see Figure 8). To prevent forward biasing these diodes, V+ must be applied before any input signals, and the input signal voltages must remain between V+ and GND. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1k resistor in series with the input (see Figure 8). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. This method is not acceptable for the signal path inputs. Adding a series resistor to the switch input defeats the purpose of using a low RON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 8). These 8
GND OPTIONAL PROTECTION DIODE
FIGURE 8. OVERVOLTAGE PROTECTION
Power-Supply Considerations
The ISL43L220 construction is typical of most single supply CMOS analog switches, in that they have two supply pins: V+ and GND. V+ and GND drive the internal CMOS switches and set their analog voltage limits. Unlike switches with a 4V maximum supply voltage, the ISL43L220 4.7V maximum supply voltage provides plenty of room for the 10% tolerance of 4.3V supplies, as well as room for overshoot and noise spikes. The minimum recommended supply voltage is 1.1V. It is important to note that the input signal range, switching times, and on-resistance degrade at lower supply voltages. Refer
FN6093.2 April 12, 2005
ISL43L220
to the electrical specification tables and Typical Performance curves for details. V+ and GND also power the internal logic and level shifters. The level shifters convert the input logic levels to switched V+ and GND signals to drive the analog switch gate terminals. This family of switches cannot be operated with bipolar supplies, because the input switching point becomes negative in this configuration. feedthrough from a switch's input to its output. Off Isolation is the resistance to this feedthrough, while Crosstalk indicates the amount of feedthrough from one switch to another. Figure 20 details the high Off Isolation and Crosstalk rejection provided by this part. At 100kHz, Off Isolation is about 68dB in 50 systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease Off Isolation and Crosstalk rejection due to the voltage divider action of the switch OFF impedance and the load impedance.
Logic-Level Thresholds
This switch family is 1.8V CMOS compatible (0.5V and 1.4V) over a supply range of 2.0V to 3.6V (see Figure 16). At 3.6V the VIH level is about 1.27V. This is still below the 1.8V CMOS guaranteed high output minimum level of 1.4V, but noise margin is reduced. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. Driving the digital input signals from GND to V+ with a fast transition time minimizes power dissipation.
Leakage Considerations
Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and GND. One of these diodes conducts if any analog signal exceeds V+ or GND. Virtually all the analog leakage current comes from the ESD diodes to V+ or GND. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or GND and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and GND pins constitutes the analogsignal-path leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog signal paths and V+ or GND.
High-Frequency Performance
In 50 systems, the signal response is reasonably flat even past 30MHz with a -3dB bandwidth of 120MHz (see Figure 19). The frequency response is very consistent over a wide V+ range, and for varying analog signal levels. An OFF switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal
Typical Performance Curves TA = 25C, Unless Otherwise Specified
0.27 0.26 0.25 0.24
RON () V+ = 2.7V RON () ICOM = 100mA 2.5 3 ICOM = 100mA
2 V+ = 1.1V 1.5
0.23 0.22 0.21 0.2 0.19 0.18 0 1 2 VCOM (V) 3 4 5
V+ = 3.6V V+ = 4.3V V+ = 3V
1 V+ = 1.5V 0.5 V+ = 1.62V 0 0 0.5 V+ = 1.8V 1 VCOM (V) 1.5 2
FIGURE 9. ON RESISTANCE vs SUPPLY VOLTAGE vs SWITCH VOLTAGE
FIGURE 10. ON RESISTANCE vs SUPPLY VOLTAGE vs SWITCH VOLTAGE
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ISL43L220 Typical Performance Curves TA = 25C, Unless Otherwise Specified (Continued)
0.28 0.26 0.24 RON () 0.22 0.2 25C 0.18 0.16 0.14 0.22 0.2 0.18 -40C 85C V+ = 4.3V ICOM = 100mA 0.32 0.3 0.28 0.26 25C 0.24 85C V+ = 2.7V ICOM = 100mA
RON ()
-40C
0
1
2 VCOM (V)
3
4
5
0
0.5
1
1.5 VCOM (V)
2
2.5
3
FIGURE 11. ON RESISTANCE vs SWITCH VOLTAGE
0.5 0.45
FIGURE 12. ON RESISTANCE vs SWITCH VOLTAGE
3.5 3 2.5 2 1.5 1 0.5 0 25C -40C
V+ = 1.8V ICOM = 100mA 85C
V+ = 1.1V ICOM = 100mA
0.4 RON () RON ()
0.35
85C
0.3 25C 0.25 -40C
0.2 0 0.5 1 VCOM (V) 1.5 2
0
0.2
0.4
0.6 VCOM (V)
0.8
1
1.2
FIGURE 13. ON RESISTANCE vs SWITCH VOLTAGE
150 1.5 1.4 100 1.3 1.2 50 Q (pC) V+ = 4.3V 0 V+ = 1.8V V+ = 3V -50 VINH AND VINL (V) 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 -100 0 1 2 VCOM (V) 3 4 5 0.3
FIGURE 14. ON RESISTANCE vs SWITCH VOLTAGE
VINH
VINL
1
1.5
2
2.5 V+ (V)
3
3.5
4
4.5
FIGURE 15. CHARGE INJECTION vs SWITCH VOLTAGE
FIGURE 16. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
10
FN6093.2 April 12, 2005
ISL43L220 Typical Performance Curves TA = 25C, Unless Otherwise Specified (Continued)
60 14 13 50 12 11 tOFF (ns) tON (ns) 40 10 9 8 7 85C 20 -40C 10 1 1.5 2 2.5 3 V+ (V) 3.5 4 4.5 25C 6 5 4 3 1 1.5 2 2.5 V+ (V) 3 3.5 4 4.5 -40C 25C 85C
30
FIGURE 17. TURN - ON TIME vs SUPPLY VOLTAGE
FIGURE 18. TURN - OFF TIME vs SUPPLY VOLTAGE
NORMALIZED GAIN (dB)
V+ = 3V 0 -20 GAIN
-10 V+ = 3V -20 -30 -40 CROSSTALK (dB)
10 20 30 OFF ISOLATION (dB) 5 40 50 60 ISOLATION 70 80 CROSSTALK 90 100 10k 100k 1M 10M 110 100M 500M
PHASE
0 PHASE (DEGREES) 20 40 60 80
-50 -60 -70 -80 -90
RL = 50 VIN = 0.2VP-P to 2VP-P 1 10 100 FREQUENCY (MHz)
100 600
-100 -110 1k
FREQUENCY (Hz)
FIGURE 19. FREQUENCY RESPONSE
FIGURE 20. CROSSTALK AND OFF ISOLATION
100 V+ = 4.5V
50 V+ = 4.5V VCOM = 0.3V 0 25C
50
iON (nA)
0
iOFF (nA)
25C
-50
-50 85C -100 0 1 2 3 VCOM/NX (V) 4 5
-100
85C
-150 0 1 2 VNX (V) 3 4
FIGURE 21. ON LEAKAGE vs SWITCH VOLTAGE
FIGURE 22. OFF LEAKAGE vs SWITCH VOLTAGE
11
FN6093.2 April 12, 2005
ISL43L220 Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: 114 PROCESS: Submicron CMOS
12
FN6093.2 April 12, 2005
ISL43L220 Thin Dual Flat No-Lead Plastic Package (TDFN)
2X A 0.15 C A D 2X 0.15 C B
L10.3x3A
10 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS SYMBOL A A1
E
MIN 0.70 -
NOMINAL 0.75 0.20 REF
MAX 0.80 0.05
NOTES -
6 INDEX AREA TOP VIEW B
A3 b D D2 E
// 0.10 C 0.08 C
0.20
0.25 3.00 BSC
0.30
5,8 -
2.20
2.30 3.00 BSC
2.40
7,8 -
E2 e k L L1
1.40
1.50 0.50 BSC
1.60
7,8 -
A C SEATING PLANE SIDE VIEW A3
0.25 0.20 -
0.30 10 5
0.40 0.15
8 1 2 3 Rev. 1 6/04
D2 (DATUM B) 6 INDEX AREA (DATUM A) 1 2 D2/2
7
8
N Nd NOTES:
NX k E2
1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd refers to the number of terminals on D. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip.
E2/2 NX L N 8 N-1 NX b 5 0.10 M C A B
e (Nd-1)Xe REF. BOTTOM VIEW C L
6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389.
NX (b) 5
(A1) L1 e CC TERMINAL TIP 9L
9. Depending on the method of lead termination at the edge of the package, a maximum 0.15mm pull back (L1) maybe present. L minus L1 to be equal to or greater than 0.3mm. 10. COMPLIANT TO JEDEC MO-229-WEED-3 except for dimensions E2 & D2.
SECTION "C-C"
FOR ODD TERMINAL/SIDE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 13
FN6093.2 April 12, 2005

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